Abaco Systems announced the VP869 high performance 6U OpenVPX FPGA processing board. Featuring two Xilinx® UltraScale+™ FPGAs and a Zynq® 7000 Series multiprocessor system-on-chip (MPSoC), it provides a form, fit and function upgrade for the VP868, providing existing users with a cost-effective performance enhancement. The VP869 can deliver up to 3.8x more DSP resources and 2.4x more integrated memory than its predecessor.
The VP869 is designed for the most demanding mission critical applications where extreme FPGA processing and I/O bandwidth capabilities are needed. Typical applications include electronic warfare, radar/sonar processing, software defined radio, advanced digital beamforming, multi-channel digital receivers/transmitters and satellite communications systems.
Two industry standard (VITA 57) FMC+ sites are provided on the VP869 for high performance analog I/O, digital communications or video input.
The VP869’s flexibility derives in part from the opportunity it provides to choose either of two Virtex Ultrascale+ FPGAs, allowing the optimum application-specific trade-off between performance, power consumption and price.
A key feature of the VP869 is its extreme backplane bandwidth, with over 72 high speed serial lanes routed to the backplane delivering 594 Gbps of data throughput for advanced processing and offload applications. 24 bidirectional high speed serial lanes provide up to 300 Gbps of data bandwidth to and from the FMC+ I/O modules, enabling the utilization of the latest ADC and DAC technology for next generation wideband applications.
In some applications, the VP869’s onboard Zynq 7000 device with its embedded ARM® cores can provide the control functionality that would normally be delivered by a single board computer, creating the opportunity to minimize slot usage and thus size, weight and power.
The VP869’s Zynq 7000 MPSoC also includes broad security functionality – such as encrypted bit streams and secure boot - that enables sensitive IP to be safeguarded.
Reduced time to deployment is significantly enhanced by Abaco’s provision of a comprehensive set of aids designed to simplify and speed development. These include a fully featured open board support package that provide a highly functional reference design example to simplify integration of application-specific IP. Stellar IP - an FPGA development tool – and the 4FM GUI user interface for controlling and monitoring the hardware are also provided, as are a Xilinx Vivado project and VHDL source code.
Find more information here.
The VP869 is designed for the most demanding mission critical applications where extreme FPGA processing and I/O bandwidth capabilities are needed. Typical applications include electronic warfare, radar/sonar processing, software defined radio, advanced digital beamforming, multi-channel digital receivers/transmitters and satellite communications systems.
Two industry standard (VITA 57) FMC+ sites are provided on the VP869 for high performance analog I/O, digital communications or video input.
The VP869’s flexibility derives in part from the opportunity it provides to choose either of two Virtex Ultrascale+ FPGAs, allowing the optimum application-specific trade-off between performance, power consumption and price.
A key feature of the VP869 is its extreme backplane bandwidth, with over 72 high speed serial lanes routed to the backplane delivering 594 Gbps of data throughput for advanced processing and offload applications. 24 bidirectional high speed serial lanes provide up to 300 Gbps of data bandwidth to and from the FMC+ I/O modules, enabling the utilization of the latest ADC and DAC technology for next generation wideband applications.
In some applications, the VP869’s onboard Zynq 7000 device with its embedded ARM® cores can provide the control functionality that would normally be delivered by a single board computer, creating the opportunity to minimize slot usage and thus size, weight and power.
The VP869’s Zynq 7000 MPSoC also includes broad security functionality – such as encrypted bit streams and secure boot - that enables sensitive IP to be safeguarded.
Reduced time to deployment is significantly enhanced by Abaco’s provision of a comprehensive set of aids designed to simplify and speed development. These include a fully featured open board support package that provide a highly functional reference design example to simplify integration of application-specific IP. Stellar IP - an FPGA development tool – and the 4FM GUI user interface for controlling and monitoring the hardware are also provided, as are a Xilinx Vivado project and VHDL source code.
Find more information here.
